1. Field of the Invention
The present invention relates to an object, a method, or a manufacturing method. In addition, the present invention relates to a process, a machine, a manufacture, or a composition of matter. Another embodiment of the present invention relates to a semiconductor device, a display device, a lighting device, a power storage device, a memory device, or a driving method or manufacturing method thereof. Specifically, one embodiment of the present invention relates to a semiconductor device provided with a means of preventing a circuit from being damaged by unexpected high-voltage application such as electrostatic discharge.
In this specification and the like, a semiconductor device generally means a device that can function by utilizing semiconductor characteristics. A transistor and a semiconductor circuit are embodiments of semiconductor devices. An arithmetic device, a memory device, an imaging device, an electro-optical device, a power generation device (e.g., a thin film solar cell and an organic thin film solar cell), and an electronic appliance each may include a semiconductor device.
2. Description of the Related Art
In a semiconductor circuit used in a semiconductor device, a semiconductor element, an electrode, or the like could be damaged by electrostatic discharge (hereinafter referred to as “ESD”). As a measure to prevent damage of a semiconductor circuit due to ESD, a protection circuit is connected to a semiconductor circuit in many cases. A protection circuit refers to a circuit for preventing overvoltage applied to a terminal, a wiring, or the like from being supplied to a semiconductor circuit. A resistor, a diode, a transistor, and a capacitor are typically used in the protection circuit.
Patent Document 1 discloses an example of a protection circuit including an oxide semiconductor film. The protection circuit including an oxide semiconductor film is known to have an extremely low leakage current in an off state. Therefore, leakage current of the protection circuit can be reduced.
Patent Document 2 discloses an example in which a so-called grounded gate (GG)-type NMOS transistor is used for a protection circuit. The GG-type NMOS transistor is characterized in that a snapback phenomenon occurs when a parasitic bipolar transistor conducts electricity. In addition, Patent Document 2 discloses that a region where a snapback phenomenon is observed in the current-voltage characteristics of the transistor has a negative resistance.
Patent Document 3 discloses an example of a protection circuit utilizing a snapback phenomenon of a transistor. Patent Document 3 discloses that current flows in both directions of a transistor by utilizing snapback phenomenon.
Patent Document 4 discloses, for example, a CPU with low power consumption, which is achieved by an extremely low leakage current of a transistor including an oxide semiconductor film in an off state.